Subject
Computer Science
Topic
Computer Hardware
Which branch handling reduces misprediction penalties without predicting outcomes?
Which branch handling reduces misprediction penalties without predicting outcomes?
ক)
Delayed branching / annul slotsখ)
Two-level adaptive predictorগ)
Gshare predictorঘ)
Perceptron predictorExplanation
Architectures like early MIPS used branch delay slots so one instruction after the branch always executes. Compilers fill the slot to hide control hazards. Predictors guess direction/target; delay slots sidestep some penalties but complicate pipelines. Modern CPUs favor dynamic prediction.Related questions
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