Subject
Computer Science
Topic
Computer Hardware
Which CPU design packs multiple instructions per long word (statically) for parallel issue?
Which CPU design packs multiple instructions per long word (statically) for parallel issue?
ক)
CISCখ)
VLIWগ)
SISDঘ)
SIMTExplanation
Very Long Instruction Word architectures rely on the compiler to schedule parallel operations. Several functional units are fed in one wide instruction. This reduces hardware scheduling complexity but requires sophisticated compilers. EPIC (Itanium) is a notable example.Related questions
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