Subject
Computer Science
Topic
Computer Hardware
In DRAM timing, which parameter denotes row-to-column delay?
In DRAM timing, which parameter denotes row-to-column delay?
ক)
tRCDখ)
tWRগ)
tREFIঘ)
tFAWExplanation
tRCD is the time between activating a row (RAS) and issuing the column read/write (CAS). It’s one of the key CAS timing figures: CL-tRCD-tRP. Lower values reduce latency but require stable silicon and signal margins. Memory controllers schedule around these limits.Related questions
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